S100 Computers - SBC Z80 CPU Board

An S-100 Single Board Computer (SBC) Z80 CPU Board.

Introduction
Bringing up an initial S100 bus system for beginners is often not easy. Typically you have to have four or five S100 boards working together to get going. You will need a CPU board, a RAM board, some type of console I/O interface and a monitor in ROM to boot up the CPU and get it to interact with you. While the 8080 or Z80 will start after reset at 0H in RAM the monitor should be at the top of the RAM's 64K address pace. All that before you even add a floppy or hard disk controller. Debugging a non-working system can be a challenge for a first time user. What is need is a simple "starter" SBC that contains all these functions in a single board. I describe here one such board with the following characteristics:-

S100 Z80 SBC Description
I decided to go with a Z80 over the 8080/8085 CPU's. Just an all round better CPU. I wanted a Z80 circuit that is proven and works with almost every vintage S100 board out there. I used the core circuit on our Z80 board.   That board is based on the old Intersystem's II CPU board. I have not come across a vintage S100 board it does not work with. It goes to 10MHz in my own system (of mainly S100Computers boards). Even works with a number of vintage DRAM boards I have here. However I had to remove the >64K windowing circuit for board space (see below).

The Z80 to S100 bus signal conversions take up quite a few 74LSxx chips on the board. Granted that could be reduced with a GAL or two but newcomers will probably not have experience programming GAL’s initially. Also it would require a lot of testing to insure the circuit emulates the onboard 74LSxx circuit and works exactly and correctly with vintage S100 boards.

Second, we need a way to communicate with the outside world. My initial prototype had the core circuit of the Propeller Console IO board onboard. However it used up too much space. Instead we will communicate with to the outside world using a standard USB port onboard and a PC using a simple TELNET terminal window. We will use the easy to use/interface a DLP USB245R Adaptor described for our Serial IO interface board. With this USB port (and code in the onboard Z80 monitor), you can download code from another Computer/PC using the XMODEM protocol and place it in RAM at any location in your system (0H to 0FFFFH) . You can then jump to the start of that code in RAM. This for example makes setting up an initial CPM system easier.

The is still enough room on the board to include a single IDE/CF-card interface to act as a hard disk for an operating system like CPM. It will be modeled after the circuit of our very reliable IDE Board.

The board has 128K of RAM (there are no common 64Kx8 static RAM DIP chips) that can be jumpered into two separate 64K sections. Under software control the lower 32K of the CPU's address space can be swapped out with another 32K in the same space. This allows the implementation of a banked version of CPM3.

The board has a 27C64 (or equivalent) ROM, 8 interrupt jumpers, a Power on Clear (POC) circuit, and a ROM power on jump to any 1K boundary circuit and an I0BYTE port. There are three sets of 8X2 unit pin jumpers to add wait states independently for ROM access, I/O access and RAM access.

I used a 5Volt 3A Pololu regulator. There are a lot of chips on this board. A TO-3 regulator capable of > 1.5 Amps takes up too much space. These Pololu units are really nice and take little real estate.

I added a few LED’ to indicate when the onboard ROM is active, when the serial port is being accessed, disk activate etc.

The board circuits are configured such that the onboard RAM, ROM, IDE circuit and serial sections can all be inactivated in stages as more functional S100 boards are added to your system later.   While the board will act as a master/slave S100 board it’s not really intended to function is a complex multiprocessor configuration. For example for debugging you cannot “see” beyond 64K of RAM in the bus. However you can actually transfer control over to our slave 8086 CPU board.

I want to stress that this is just a "starter CPU board" for an S100 bus system.
The schematic for this board is available at the bottom of this page.

Equipment Needed
Users will also need to buy a PROM/EEPROM programmer (e.g. Wellon VP-290) to program the onboard PROM/EEPROM. The required files are also at the bottom of this page. The z80 monitor code is essentially a stripped down version of the MASTER.Z80 monitor.

Step By Step Building the SBC-Z80 CPU Board.
The first step is to examine the bare board carefully for scratches or damaged traces. Use a magnifying glass if need be. The quality of the boards we get is excellent. I must have done over 100 different boards by now, never had a problem, but there is always a first time. A broken trace is almost impossible to detect by eye on a completed board.

Next solder in all the required IC sockets, resistors, resistor arrays, capacitors, jumpers, and switches SW101 & 102, the transistor Q1and voltage regulator. Do not install the LED's at this stage. Do not install a socket for U110. The IC U110 does not use a socket. In order to gain more board real estate the 74LS244 is soldered directly to the board inside the 628128 RAM socket (U111) see below. When soldering be very careful to not use too much solder. Use a fine tip iron. This board has a very dense layout of traces (more so than many of our other boards). In many places two traces run between IC pins. Slobbering solder around will lead to shorts. Less is more.

On this board (if relevant) the + terminal will have a square pad. Likewise for jumpers and resistor arrays pin 1 will have a square pad. Be sure you put the resistor arrays in with the correct orientation of pin 1. Check their values also before soldering (they are difficult to remove). Make sure you have arrays that have a common pin 1.

You can use cheaper "double swipe" IC sockets. However for a critical board like this I prefer to use "Machine Tooled" IC sockets (e.g. Jameco # 38623). Unfortunately they are more expensive and you have to be particularly careful not to bend the IC pins. If you think you will be doing a lot of EEPROM burning you should use the Low Profile ZIF sockets (e.g. Jameco #102745) for the EEPROM socket. However be aware that long term these do not make as good a connection as the above Machine Tooled IC sockets. The two clock oscillators should have their own special sockets (e.g. Jameco #133006). The IC socket for U111 (the 128K RAM) is a special case. Use a socket that has its center open. There is usually a plastic cross bridge in the center of the socket. Cut this out. You will be inserting a 74LS244 in this space on the board (see the picture below). This old trick often use by PC video board manufacturers saves some precious space on the board. The special USB to serial port adaptor has extra wide pins. They will not fit in a machine tool socket. Use an 18 pin standard double swipe socket. Note also pin 1 of this socket is at facing downwards. I have done a custom 18 pin socket set of pads on this board for the wider pins that the USB Port module takes. This allows you to solder the unit directly to the board. Do not do so at this time however - just leave the socket space empty for now.

Its good to check there are no board shorts at this stage. With the switches SW101 & 102 in the open position you should have an almost infinite resistance. Insert the board into the bus with no other boards in your system. Check that the voltage on all the relevant IC pins is between 4.8 volts a 5.2 volts. Note the Z80 chip itself has pin 11 as its +5 volts input.

BTW, your system should boot and run correctly with its own Z80 CPU if you have one at this stage. If not, you have a serious solder bridge somewhere on the board. Before you do anything else with a magnifying glass go over every socket on the board and examine for a proper solder joint. I like to "reheat" each joint just to be on the safe side. It's easy not to have a good solder joint for the ground pins. Double check.   Extra time here will save you hours later!   If you pass this test, remove all boards in your system.

Next we will check the boards 5 LED's. Insert each LED into the board (usually the longer lead into the square pad) but do not solder yet. Insert the board into your S-100 system and with a probe tied to +5V or ground touch appropriate signaling pin socket that controls that LED. For example pin 6 of U28 grounded should light up LED D5. BTW, the color of the LED's is up to you. D8 is the Z80 Bus master active LED. I like to have all boards that are "active" in my system light up with a blue LED. Here is a picture of the board at this stage:-

Unlike many of the other boards on this web site it's not really practical to add chips one by one to this board with functional circuit testing. So you kind of have to take the plunge and add everything. We will however ignore the IDE Drive and USB port circuits initially. Start with a 4MHz Oscillator in U46. Indeed at these speeds you can use 74LSxx chips throughout.

Add the following chips:-
U12, U2, U3.   U18, U15. (Do not Install U19 & U20 yet).
U35, U26, U29, U28, U25, U24, U109, U117, U116, U105.
U43, U34, U33, U38, U39, U40, U45, U32, U31, U41, U36, U30, U37.
U9, U10, U11, U22 (better 74F373), U21.
Add 2MHz Oscillator at U42 and (initially) a 4MHz (for now), Oscillator at U46.
Add the Z80 CPU (U1).
Next carefully solder directly to the board U110 (a 74LS244). If you can, checkout the chip beforehand in another board. It's hard to remove later.

There are numerous ways you can go from here. The easiest is if you have a working Console IO board (for keyboard in and video out). If you take this approach continue from here. If you don't have a functional separate console I/O board in your system skip further down this page to a section that describes the build with that approach.

1. Assembly with Z80 CPU circuit with the onboard ROM and RAM and using an external S100 bus Console I/O board interface.
Before you start, make sure that the jumper K5 on the Console I/O board is jumpered 2-3. This Z80 SBC only uses the address lines A0-A7 to address I/O ports. Our "dedicated" Z80 board zeroes the upper address lines to allow 16 bit port addressing. There was no room on this board to add this circuit..

Initially we will not use the onboard RAM, so do not install U111.
Insert the following jumpers.
JP10, JP8 1-2, P101 3-4, K101 1-2, K105 2-3, K107 1-2, K103 2-3 (for now). P3 all open, P8 to P10 1-1, 2-2, 3-3, 4-4.
If your S100 bus motherboard does not have a Reset and Power On Clear (POC) circuit, Jumper JP7, JP4, & JP6.
If you already have our SMB or a IMSAI or Altair front panel for example you do not need these jumpers. If you have the SMB you can install it in your system. It will make debugging easier.

In your system you need to determine if the S100 bus "MWRT" signal is generated on your S100 bus motherboard or if you have one -- a front panel. This is the S100 bus pin 68. It is generated in various ways from the two S100 signals sOUT (pin 45) and pWR* (pin 77). If there are jumpers disable it and use the MWRT signal on this board. MWRT on this board is sent to the bus via jumper P4 3-4. Here is a close-up picture.

If both your front panel and this board try to generate the MWRT signal you will have instability in the system.

You also need to jumper P4 1-2 if -- as is usually the case, the bus master provides the 2MHz clock signal.
Next jumper P37 1-2 (a vertical jumper), P36 3-4 (wait states M1 enabled for now), K1 2-3 and K2 2-3.
For wait states, start with RAM (M1 cycle, one wait state) P112 1-2, I/O (two wait states) P114 1-2 and 3-4, ROM (one wait state) P113 1-2.

In this configuration we will first start with the ROM completely filled with the byte 76H. This is the Z80 opcode to HALT the CPU. If you have a Wellon VP290 programmer for example use the Edit menu option and the fill command. Make sure to fill the whole EEPROM with 76's.
Check one more time no chips are in backwards and all the jumpers described above are correct.

Insert the board into your system and boot up. The Z80 will start at 0H and increase its address lines to F000H. At this point the onboard ROM activates, The CPU reads 76H and immediately halts. If you have a front panel or our SMB, the "HALT" LED will stay on. The S100 sHLTA bus line (pin 48), will go high. The address bus should indicate 0F001H. Ignore any data indicated on the data lines and outputted by the SMB or your front panel.   The ROM_SEL* LED D5 should light up. The lower RAM page LED D102 should light up and of course the Z80 Bus Master LED D8 should light up. (LED's D103 and D101 should not). If the LED D104 lights up you are getting a high rather than low on the ROM'S pin 2 (A16). Force it to low by jumpering K105 1-2. If this corrects the problem back track and determine why U109 pin 3 is high.

The circuit that allows the CPU to get to the ROM address at F0001H is explained here.

If the CPU does not halt at address 0F001H there is a problem -- probably with your address lines or buffers.   One thing you can do is bend out pin 1 of U31. Jumper it to pin 19 of U15. Upon power-up/reset, the Z80 will start at address 0H, increase its address lines and within a short time halt at 0F000H (when pin 19 of U15 goes low and the CPU receives a WAIT* request, (its pin 24 going low)). If this does not happen check the jumpers and adders lines going to U15. A common problem is your jumpers are wrong for U15, or jumpers P101, JP9 are wrong.

Next we will place in our EEPROM at 0H the following bytes:-

3E 33                ; LD     A,33H
D3 01                ; OUT 01H
18 FA                ; JR back to Start

All the rest of the EEPROM still contains 76's.
Install the data out buffer U19.
Insert the EEPROM in the board and repeat the boot process. The "ROM Access" LED D5 should be on.

If you have your console at port 01H you should see a continuous display of 333333... on the screen. If instead you get a CPU HALT, there is an addressing problem -- the Z80 is going to the wrong address in the ROM. Check the ROM jumpers. The above code is has a relative jump so will work at any 256 byte boundary. To be sure we are operating from 0F000H in memory next use the following code in the ROM.

3E 33                ; LD     A,33H
D3 01                ; OUT 01H
C3 00 F0            ; JP back to Start

Again continuous 3's should appear on the console. It is critical you get this test to work. Do not go further until you do so. If it does not work there are a number of things you should check.

Is the ROM (a 28C64) working OK? If you have another CPU board that takes this type of ROM (for example our Z80 CPU board) insert it in that board and look for 3's on your console.

Do you still have a ROM addressing problem. Are you somehow going to another place in the ROM. Often this is the next 4K page at 1000H in the ROM. If you EPROM programmer will allow you to edit code to be written into the ROM (as for example the Wellon VP-290 unit) at 1000H in the ROM enter:-

3E 34                ; LD     A,34H
D3 01                ; OUT 01H
C3 00 F0            ; JP back to Start

If you see 4's on the console then you have a ROM addressing problem. Check your jumpers.

If you see blank spaces on your console of other characters then check U19 and its surrounding circuit.

If you have our SMB you can jumper pin 6 of U28 to pin 2 of U43. This time on startup the CPU should stop at F000H and be displayed as the current address on the SMB. (or whatever jumper setting you have for P3/P8/P10). You can then flip the SMB stop switch, disconnect the jumper and single step the CPU. It should cycle from F000H to F006H always.   Check the signals at each step (address lines, sOUT etc.).

Here is a picture of the board at this step:-

If not then you need to look at the signals going to U111. Is its pin 24 (OE*) pulsing low. Is its Pin 29 (WR*) pulsing low.

OK, we now need to make one adjustment. Rather than have the Z80 jump to 0F000H on reset we will have it jump to 0E000H. This is required because the Z80 monitor code (described below) is quite extensive and requires more the 4K. With 8K we can include diagnostic routines for the IDE drive etc. However if at a later stage you want a smaller monitor (more of a TPA area for CPM), you can go back to the above setup.

To have the Z80 startup at 0E000H you need to change the 74LS862 (U15), equates. Jumper P3 7-8 (only), and move the P10-P8 jumper to P8-P9. Here is a picture.

Before you burn the Z80 Monitor (see next) , you can if you like check things out with the following code as described above.

3E 34                ; LD     A,33H
D3 01                ; OUT 01H
C3 00 E0            ; JP back to Start

Running the Z80 Monitor
Burn an EEPROM with the SBC-MON.Z80 HEX file provided below. Note this code assumes that you do not have the IOBYTE port yet installed, its not yet installed so it reads as 11111111b -- for now. With this configuration the monitor assumes our console IO board status port at 0H and a data port at 1H. If yours is different change the port equates at the beginning of the code. Programming the EEPROM is device specific but if you have a Wellon VP-290 programmer this is what the dialog load file should look like:-

The monitor should come up on the console like this.

Here is a picture of the board at this stage

It is important that you have a solid functional monitor at this stage. From it you can check your RAM my moving blocks of RAM around with verify etc. However a number of the functions will not work at this stage.

Next we will add the onboard I/O port addressing circuit on the board. The board can be configured to utilize 8 contiguous I/O ports on any even hex boundary in the CPU's 256 I/O ports available to the Z80. The "Base Port Address" is set with the 8 unit dip switch SW101. In the monitor software we will assume its set for a base port of 30H. For Port 30H the settings therefor will be bit 4 & 5 high, all he rest low.   The third and fourth leftmost SW101 switch open, all the rest closed.   Then when the Z80 addresses any port between 30H and 37H, pin 19 of IC101 will go low.   This port selection is then split into 4 pairs of ports (depending on A0 & A1) , via U113. The lower 4 ports of the block are dedicated to the IDE/CF-card 8255A chip (see below) and lower a signal called 8255_SEL* (pin 6 of U109). The lower 6 I/O ports of the block also activate the onboard bidirectional 8 bit data bus (U101 & U107). This is done with the signal BUS_SELECT* (pin 6 of U43).

Insert IC101, U113, and U104. Do not install the Drivers U101 and U107 yet.
Bring up the monitor and input from port 30H, 31H... 37H. Check pins 1 & 19 of U107 pulses low (and only for these ports).
Repeat outputting to the same ports checking for a low pulse on pins 1 & 19 of U101.

If OK install the buffers U101 & U107.
Very carefully jumpering any one of the pins 2,4, 6, 8, 11, 13, 15 or 17 of U107 should show the corresponding bit low when you input port 30H.    Be very careful to ground the correct pin. Do not output to port block during this time.

Next we will add the IOBYTE port circuit.   This port (36H) is for the user to redirect the console and or printer default outputs. However in software they can serve any function.

Install the IOBYTE switch SW102. Close all switches except the 4th switch from the left (bit 4). With bit 4 high the monitor will ignore the switch settings.
Add U102. U110 should already be soldered in under the RAM IC (see above).

Fire up the board. The signon display should show an IOBYTE value of 11010000. Change the IOBYTE value to 11111111 and reboot.   In this configuration (bits 0 & 1 HIGH/Open and bit 4 HIGH) all output goes to the S100 bus console -- as currently coded in the Monitor software. (Make sure that the jumper K5 on the Console I/O board is jumpered 2-3).

Note the two left most switches, (bits 6 & 7), are NOT connected to the IOBYTE switch (they have a different function see below).

Adding the USB Port
Next we will add the USB I/O Port unit.
Add U114 and U115. Insert the DLP USB245R Adaptor with the USB port facing upward. The pins on this adaptor are quite long so the unit stands up quite a bit from the board. The board will still fit in a regular card cage next to another board, but if you like you can solder it directly into the board clip a few mm's from each pin. I specifically had larger holes made to accommodate the wide pins on this unit.

We now will utilize this USB port for console/serial I/O. Flip the IOBYTE port bits 0 & 1 to LOW (closed). Hookup a USB cable from this unit to a USB port on your PC. Obtain and install any kind of Windows Telnet software. I like the Telnet Program Absolute Telnet. Under "Options", select "Properties", then select "Connection". Your DLP windows driver should appear as a COMx port. If you pull out the USB cord that COM port should disappear from the "port" dropdown menu. It will reappear if you reconnect. Fire up the SBC Z80 board. The monitor should sign on as seen here:-

You now have a basic functional Z80 driven SBC. Different Telnet programs have different setup/requirements. The one above works well with a setting of 115200 baud (No parity, 1 stop bit and 8 data bits). I'm not sure what is going on but changing the baud rate, parity, stop bits, etc. does not appear to make any difference. Perhaps somebody can explain how these DLP units are working. In guess the USB protocol takes care of the settings.

Here is a picture of the board at this stage:-

You will note I changed the USB Port LED, (D103). The pulses to this LED are very short. I found that the larger (Green) LED did not light up well. I replaced it with a small point light source LED. These LED's produce a very concentrated point of light and show these pulses better.

BTW, a simple diagnostic check of the USB Port. With the following at 0H in RAM

3E 34
D3,34
C3 00 00

you should see continous "4444..." on the TTY terminal. The D103 port should also light up.

Adding the IDE Port
Lastly we will install the IDE/CF Card adaptor.
You need to obtain an IDE to CF-CARD adaptor. Fortunately these single card IDE to CF cards are quite common. They typically cost ~$10.
I have been using the SyBA "SD-CF-IDE-DI IDE" adaptor (NewEgg Item# N82E16822998003), shown here:-

Also read up on our IDE board before going further. It explains much of what is being used here.

Install U103, U106 and jumpers P104 and K102 1-2.
Install UU106 (a 8255A-5). Install the above IDE adaptor with a CF card.

There is a trace free zone on the front of the board to avoid shorts between the back of the above IDE adaptor and the board itself. Just to be safe I like to add a layer of transparent tape to this area of the board. Before soldering in the right angle double row connector pins, hook up the adaptor and position its angle/spacing correctly before soldering the connector in. The back of the adaptor must not touch the board. The standard right angled double row pins (Jameco # 53605) work fine but you need to add the adaptor before soldering so the pins just come through the other side.

Boot up the system. The LED on the Adaptor board should light up when power is applied. The monitor "I" command contains an extensive sub-menu to read, write, view sectors on the CF-CARD. We will utilize the card later in the software section (see below).
Here is a picture of the board at this completed stage:-

Here is a picture of the current IDE Menu within the boards Z80 monitor:-

If you run into problems with this adaptor on this board and if you have our S100 IDE board you can use that board for debugging. The interface is identical. However since both circuits use the same default 30H base port you will need to set the base port on this board to something other than 30H and adjust the ports accordingly in the Z80 monitor.

This completes the assembly of this board (using the S100 bus Console I/O).

2. Assembly with Z80 CPU circuit with the onboard ROM & RAM and using the onboard USB port for Console I/O.
If you do not have an S100 bus video board/Console IO board , you will have to bring the board up using the onboard USB port for all console IO. This unfortunately is a bit more difficult as you have to go a distance more or less blind until you have a function console. Even if it's kludge, if you can rig up a console port for communication off this board and on another S100 temporally -- use that approach and follow the procedure described above.

If you have an I/O port on a board in your system that has any kind of indicator LED consider using that as a temporary output console port during debugging here. For example our Parallel Ports I/O board has a nice 8 bit LED bar normally at port 05H. The old IMSAI parallel ports board also has indicator LED's.

Many of the steps with the non-Console IO approach are the same as described above but I will repeat the whole process for clarity.

Initially we will not use the onboard RAM, so do not install U111.
Insert the following jumpers.
JP10, JP8 1-2, P101 3-4, K101 1-2, K105 2-3, K107 1-2, K103 2-3 (for now). P3 all open, P8 to P10 1-1, 2-2, 3-3, 4-4.
If your S100 bus motherboard does not have a Reset and Power On Clear (POC) circuit, Jumper JP7, JP4, & JP6.
If you already have our SMB or a IMSAI or Altair front panel for example you do not need these jumpers. If you have the SMB you can install it in your system. It will make debugging easier.

In your system you need to determine if the S100 bus "MWRT" signal is generated on your S100 bus motherboard or if you have one -- a front panel. This is the S100 bus pin 68. It is generated in various ways from the two S100 signals sOUT (pin 45) and pWR* (pin 77). If there are jumpers disable it and use the MWRT signal on this board. MWRT on this board is sent to the bus via jumper P4 3-4. Here is a close-up picture.

If both your front panel and this board try to generate the MWRT signal you will have instability in the system.

You also need to jumper P4 1-2 if -- as is usually the case, the bus master provides the 2MHz clock signal.
Next jumper P37 1-2 (a vertical jumper), P36 3-4 (wait states M1 enabled for now), K1 2-3 and K2 2-3.
For wait states, start with RAM (M1 cycle, one wait state) P112 1-2, I/O (two wait states) P114 1-2 and 3-4, ROM (one wait state) P113 1-2.

In this configuration we will first start with the ROM completely filled with the byte 76H. This is the Z80 opcode to HALT the CPU. If you have a Wellon VP290 programmer for example use the Edit menu option and the fill command. Make sure to fill the whole EEPROM with 76's.
Check one more time no chips are in backwards and all the jumpers described above are correct.

Insert the board into your system and boot up. The Z80 will start at 0H and increase its address lines to F000H. At this point the onboard ROM activates, The CPU reads 76H and immediately halts. If you have a front panel or our SMB, the "HALT" LED will stay on. The S100 sHLTA bus line (pin 48), will go high. The address bus should indicate 0F001H. Ignore any data indicated on the data lines and outputted by the SMB or your front panel.   The ROM_SEL* LED D5 should light up. The lower ROM page LED D102 should light up and of course the Z80 Bus Master LED D8 should light up. (LED's D103 and D101 should not). If the LED D104 lights up you are getting a high rather than low on the ROM'S pin 2 (A16). Force it to low by jumpering K105 1-2. If this corrects the problem back track and determine why U109 pin 3 is high.

The circuit that allows the CPU to get to the ROM address at F0001H is explained here.

If the CPU does not halt at address 0F001H there is a problem -- probably with your address lines or buffers.   One thing you can do is bend out pin 1 of U31. Jumper it to pin 19 of U15. Upon power-up/reset, the Z80 will start at address 0H, increase its address lines and within a short time halt at 0F000H (when pin 19 of U15 goes low and the CPU receives a WAIT* request, (its pin 24 going low)). If this does not happen check the jumpers and adders lines going to U15. A common problem is your jumpers are wrong for U15, or jumpers P101, JP9 are wrong.

Next we will place in our EEPROM at 0H the following bytes:-

3E 33                ; LD     A,33H
D3 01                ; OUT 01H
18 FA                ; JR back to Start

All the rest of the EEPROM still contains 76's.
Install the data out buffer U19.
Insert the EEPROM in the board and repeat the boot process. The "ROM Access" LED D5 should be on.

You should see a continuous HIGH pulse on the S100 bus line 45 (sOUT). If instead you get a CPU HALT, there is an addressing problem -- the Z80 is going to the wrong address in the ROM. Check the ROM jumpers. The above code is has a relative jump so will work at any 256 byte boundary. To be sure we are operating from 0F000H in memory next use the following code in the ROM.

3E 33                ; LD     A,33H
D3 01                ; OUT 01H
C3 00 F0            ; JP back to Start

Again you should see a continuous HIGH pulse on the S100 bus line 45 (sOUT). It is critical you get this test to work. Do not go further until you do so. If it does not work there are a number of things you should check.

Is the ROM (a 28C64) working OK? If you have another CPU board that takes this type of ROM (for example our Z80 CPU board) insert it in that board and look for continuous HIGH pulse on the S100 bus line 45 (sOUT).

If you have our SMB you can jumper pin 6 of U28 to pin 2 of U43. This time on startup the CPU should stop at F000H and be displayed as the current address on the SMB. (or whatever jumper setting you have for P3/P8/P10). You can then flip the SMB stop switch, disconnect the jumper and single step the CPU. It should cycle from F000H to F006H always.   Check the signals at each step (address lines, sOUT etc.).

Here is a picture of the board at this step:-

Next add U15 a HM628128 (128KX8) RAM chip. Repeat the above test. Jumper K105 1-2 (for now), K103 1-2 and K106 2-3.
If a problem check all jumpers, and for bent pins etc.
Add the data in buffer U20 and repeat.

Next we need to check our RAM chip is OK. Burn a ROM with the following code at 0H in the ROM.

21 1200     START:LD HL,1200H
3E 30             LD A,30H
77                LD (HL),A
AF           XXX: XOR A
7E                LD A,(HL)
D3 01             OUT (01),A
3C                INC A
77                LD (HL),A
FE 39             CP A,39H
20 F6             JR NZ,XXX
18 EE             JR START

Reboot your system. Check the WR* (pin 29) on the RAM chip U111, is continuously pulsing LOW.
If not then you need to look at the signals going to U111. Is its pin 24 (OE*) pulsing low.

OK, we now need to make one adjustment. Rather than have the Z80 jump to 0F000H on reset we will have it jump to 0E000H. This is required because the Z80 monitor code (described below) is quite extensive and requires more the 4K. With 8K we can include diagnostic routines for the IDE drive etc. However if at a later stage you want a smaller monitor (more of a TPA area for CPM), you can go back to the above setup.

To have the Z80 startup at 0E000H you need to change the 74LS862 (U15), equates. Jumper P3 7-8 (only), and move the P10-P8 jumper to P8-P9. Here is a picture.

Before you burn the Z80 Monitor (see next) , you can if you like check things out with the following code as described above.

3E 34                ; LD     A,33H
D3 01                ; OUT 01H
C3 00 E0            ; JP back to Start

Again check you are getting a continuous HIGH pulse on the S100 bus line 45 (sOUT).

Running the Z80 Monitor
Burn an EEPROM with the SBC-MON.Z80 HEX file provided below. Note this code assumes that you do not have the IOBYTE port yet installed, its not yet installed so it reads as 11111111b -- for now. With this configuration the monitor assumes our console IO board status port at 0H and a data port at 1H. It can be changed any time you use a new S100 bus Console I/O board.

Programming the EEPROM is device specific but if you have a Wellon VP-290 programmer this is what the dialog load file should look like:-

Since we don't have a functional console yet the only thing you can monitor is the sOUT line. If your ROM/RAM/Monitor is functioning correctly you should see sOUT activity for example every time you reboot. It will be sending signon text to port 01H.
Here is a picture of the board at this stage:-

Next we will add the onboard I/O port addressing circuit on the board. The board can be configured to utilize 8 contiguous I/O ports on any even hex boundary in the CPU's 256 I/O ports available to the Z80. The "Base Port Address" is set with the 8 unit dip switch SW101. In the monitor software we will assume its set for a base port of 30H. For Port 30H the settings therefor will be bit 4 & 5 high (OPEN), all he rest low (CLOSED).   The third and fourth leftmost SW101 switch open, all the rest closed.   Then when the Z80 addresses any port between 30H and 37H, pin 19 of IC101 will go low.   This port selection is then split into 4 pairs of ports (depending on A0 & A1) , via U113. The lower 4 ports of the block are dedicated to the IDE/CF-card 8255A chip (see below) and lower a signal called 8255_SEL* (pin 6 of U109). The lower 6 I/O ports of the block also activate the onboard bidirectional 8 bit data bus (U101 & U107). This is done with the signal BUS_SELECT* (pin 6 of U43).

Insert IC101, U113, and U104, U101 and U107..

Next we will add the IOBYTE port circuit.   This port is for the user to redirect the console and or printer default outputs. However in software they can serve any function.

Install the IOBYTE switch SW102. Close all the switches except the right two switches (bits 0 and 1).
Add U102. U110 should already be soldered in under the RAM IC (see above).

Note the two left most switches, (bits 6 & 7), are NOT connected to the IOBYTE switch (they have a different function see below).

Adding the USB Port
Next we will add the USB I/O Port unit.
Add U114 and U115. Insert the DLP USB245R Adaptor with the USB port facing upward. The pins on this adaptor are quite long so the unit stands up quite a bit from the board. The board will still fit in a regular card cage next to another board, but if you like you can solder it directly into the board clip a few mm's from each pin. I specifically had larger holes made to accommodate the wide pins on this unit.

We now will utilize this USB port for console/serial I/O. Flip the IOBYTE port boots 0 & 1 to LOW (closed). Hookup a USB cable from this unit to a USB port on your PC. Obtain and install any kind of Windows Telnet software. I like the Telnet Program Absolute Telnet. Under "Options", select "Properties", then select "Connection". Your DLP windows driver should appear as a COMx port. If you pull out the USB cord that COM port should disappear from the "port" dropdown menu. It will reappear if you reconnect. Fire up the SBC Z80 board. The monitor should sign on as seen here:-

You will note I changed the USB Port LED, (D103). The pulses to this LED are very short. I found that the larger (Green) LED did not light up well. I replaced it with a small point light source LED. These LED's produce a very concentrated point of light and show these pulses better.

Adding the IDE Port
Lastly we will install the IDE/CF Card adaptor.
You need to obtain an IDE to CF-CARD adaptor. Fortunately these single card IDE to CF cards are quite common. They typically cost ~$10.
I have been using the SyBA "SD-CF-IDE-DI IDE" adaptor (NewEgg Item# N82E16822998003), shown here:-

Also read up on our IDE board before going further. It explains much of what is being used here.

Install U103, U108 and jumpers P104 and K102 1-2.
Install U106 (a 8255A-5). Install the above IDE adaptor with a CF card.

There is a trace free zone on the front of the board to avoid shorts between the back of the above IDE adaptor and the board itself. Just to be safe I like to add a layer of transparent tape to this area of the board. Before soldering in the right angle double row connector pins, hook up the adaptor and position its angle/spacing correctly before soldering the connector in. The back of the adaptor must not touch the board. The standard right angled double row pins (Jameco # 53605) work fine but you need to add the adaptor before soldering so the pins just come through the other side.

Boot up the system. The LED on the Adaptor board should light up when power is applied. The monitor "I" command contains an extensive sub-menu to read, write, view sectors on the CF-CARD. We will utilize the card later in the software section (see below).
Here is a picture of the board at this completed stage:-

Here is a picture of the current IDE Menu within the boards Z80 monitor:-

Jumper	Function
JP4,JP5,JP6,JP7	Used if the there is no reset, power on reset circuit in your system. (Normally all connected).
K1	Either the S100 bus NMI (pin 12) or the Power Fail/Error (pin98) triggers the Z80 NMI input pin
P4	Pin 1-2 to deliver a 2MHz clock to pin 49 on the bus. Pin 3-4 to deliver the MWRT signal to the bus. (Normally both jumpers are closed)
K2	Normally 2-3. Not really used here.
JP1, JP2, JP3	This provides extra ground lines on board IF ALL boards in the system meet IEEE-696 specs. Normally unconnected.
JP37	Normally 1-2 (pSync timing). For some older S100 boards try 2-3.
P113	Sets number of wait states for onboard EEPROM (0-8). No wait states needed with onboard EEPROM
P114	Sets number of wait states for all S100 bus I/O (0-8). No wait states needed at 5 MHz
P57	Sets number of wait states for onboard RAM (0-8). No wait states needed with onboard RAM
K103	With onboard ROM & RAM 1-2. If External RAM S100 boards are used, jumper 2-3 along with K106 1-2
K106	Normally 2-3. Jumper 1-2 to inactivate the on board RAM -- along with K103 1-2.
K105	Jumper 1-2 for no lower 32K page select. 2-3 allows "high" or "Low" 32K RAM pages within the CPU's 64K address space (Normally 2-3)
K107	K107 normally 1-2. (2-3 is for a front panel setup, not normally used).
K101	Inactivates address lines A16 -A23 (for older pre IEEE-696 boards) Normally 1-2
P101	EEPROM Address line A12. For address E000H to FFFFH Jumper 5-6 (Uses Lower & Upper 4K pages of the EEPROM)
JP8	Address line A11. Normally jumpered 1-2
JP9	Not used with 27C64K EEPROMS
P104	Apply Vcc to IDE adaptor, normally closed
K102	IDE Drive select. Only one drive on this board so Jumper 1-2.
P8,9,19	These jumpers set the location of where the CPU will find the ROM Monitor. Normally it will be at F000H, so P6 1-4 pins connect to P10 1-4 pins. P9 is unconnected.
P3	These are jumpers must match the above P8, 9, 10 jumpers so jumper 1-2, 3-4, 5-6 & 7-8.

Here are close-up pictures of a typical setup (Output to Console I/O board).

This board has numerous jumpers that should allow great flexibility as you build up your system with other boards. I have just outlined above the simplest configuration. For example if we look at the following circuit:-



We see that the if A12 address line of the 28C64 is jumpered P101, 5-6 (the default setup), and the POJ circuit is set to kick in at E000H a full 8K ROM will be utilized.   In this mode you will have 58K of RAM for CPM etc.   If however we jumper the POJ circuit to kick in at F000H and set P101, 3-4, the EEPROM will be split into two 4K segments depending on the output of U116B. On reset it will be 0 utilizing the lowest 4K. If we output to port 36, bit 1, a one the upper 4K of the EEPROM will be selected.   This allows for a 2 page 4K ROM and allows you to have 60K or RAM for CPM etc.   This is what we also did with the V2 Z80 CPU board. Such paging tricks are not for everybody, the ROM switching software is tricky but it's there if you need it.

Note in the simplest state Jumpering P101 1-2 (the bottom two pins) you would activate the top “half” of the ROM. To the Z80, addressing E000H –EFFFH or F000H – FFFFH the ROM code would appear identical. The monitor code would have to be written with a ORG of F000H. This 2K of code would have to reside 1000H-1FFFH in the ROM. If you jumpered P101 pin 2 to GND then the Z80 addressing E000H –EFFFH or F000H – FFFFH the ROM code would appear identical but the monitor code would have to be written with a ORG of E000H. This 2K of code would have to reside 0000H-0FFFH in the ROM. The reason for the 3-4 jumper during the build is that on reset the Flip Flop U116 pin 9 is low and so one simply burns the ROM in the lower page and a monitor ORG of E000H.

Likewise the 128K of RAM chip in the default mode utilizes only 64K of RAM. The circuit above allows you to flip the lower 32K of this RAM with another 32K of RAM in this chip by outputting to port 36H a 0 or 1. This is illustrated in the SBC-Monitor code with the "Y" command. This function is mainly used for building a banked version of CPM3 and is available for our more sophisticated users.

SBC Monitor.
The monitor for this board is based on the Master.Z80 monitor. There is an XModem command to download files from your PC (via the USB port) and run in the boards RAM (at any defined location). There are commands to read, display and write multiple sectors to/from the onboard IDE/CD Card. Because of time constraints, I have NOT written a CPM/CPM3 BIOS etc. to run that operating system from the board. Everything you need is there; hopefully somebody can do this and have it available for all. Here is a picture of the monitors main commands:

Running the Board at 8MHz.
This Z80 board to works reliably in both my systems at 8MHz using a Sharp "Z80A-CPU-D" (with no wait states). With the next Oscillator I have (10MHz) it is unreliable, but I have not experimented much with wait states etc.    Interestingly with a "10MHz" Zilog chip "Z84C0010PEG" it was less reliable at 8MH without wait states. Also remember for these speeds you will need an active terminated S-100 bus.

SOFTWARE
I have written a basic monitor for this board. All the usual things are there including multi-sector read/writes to the CF-Card. See the bottom of this page for more info and to download the files.   The IOBYTE switches determine the source of the Console I/O, this is described in the code listing.

There is also a program called SBC_IDE0.ASM which will run at 100H in RAM. It also runs CF Card disk diagnostics.   It is written in the Digital Research MAC assembler format so the core sector read/write routines can be spliced directly into a CPM3 BIOS. Note, currently the Console I/O in that program is to our Propeller I/O board, however it can be easily modified to the above serial/USB port/Telnet for I/O. It's main function is to provide the BIOS routines.

Remember for testing, the monitor "X" command will allow you to download any binary file to anywhere in RAM and then jump to it. You can even test altered forms of the monitor itself with a (temporary) ORG at say, 100H.

Home	S-100 Boards	History	New Boards	Software	Boards For Sale
Forum	Other Web Sites	News	Index